1. Field of the Invention
The present invention relates to a field emission-type electron source-for emitting electron beams under influence of an electric field and also to a method of manufacturing the same.
2. Description of the Prior Art
Of the various field emission-type electron sources known in the art, a Spindt-type electrode such as disclosed in, for example, U.S. Pat. No. 3,665,241 has been well known. The Spindt-type electrode includes a substrate having a multiplicity of emitter chips of a generally triangular pyramid shape arranged on one surface thereof, emission holes through which respective tips of the emitter chips are exposed to the outside, and gate layers disposed in an insulated relation to the emitter chips. When the Spindt-type electrode is in use, electrons are emitted in vacuum from the tips of the emitter chips through the emission holes upon application of a high voltage to the gate layers then serving as negative electrode relative to the emitter chips.
It has, however, been found that the Spindt-type electrode does not only require a complicated manufacturing process, but difficulty has hitherto been encountered to tailor the emitter chips of the generally triangular pyramid shape to precise dimensions. Accordingly, when it comes to application of the field emission electron source to, for example, a planar light emitter or a flat display, the Spindt-type electrode is incapable of being manufactured in a large format with a sufficiently large surface area for electron emission.
The Spindt-type electrode has an additional problem in that the electric field tends to converge so as to concentrate on the tips of the emitter chips. Accordingly, where the degree of vacuum around and adjacent the tips of the emitter chips is so low as to permit residue gas to drift around the tips of the emitter chips, the residue gas tends to be positive ionized by the electrons emitted and the resultant positive ions would subsequently collide against the tips of the emitter chips. Once this occurs, the tips of the emitter chips are damaged (for example, as a result of the ion bombardment), resulting in reduction in stability and efficiency of the current density of the electrons emitted and also reduction in lifetime of the emitter chips.
Accordingly, in order to substantially eliminate a possible of occurrence of those problems, the Spindt-type electrode has to be used in a highly evacuated atmosphere (for example, about 10xe2x88x925 to about 10xe2x88x926 Pa), and, for this reason, the use of the Spindt-type electrode tends to result in increase of cost and handling difficulty.
To substantially eliminate the problems inherent in the Spindt-type electrode, the field emission-type electron sources of a type utilizing MIM (Metal Insulator Metal) and MOS (Metal Oxide Semiconductor) have been suggested. As the nomenclature indicates, the MIM electron source makes use of a metal-insulator-metal laminar structure whereas the MOS electron source makes use of a metal-oxide film-semiconductor laminar structure. In these field emission-type electron sources, the insulator film or the oxide film is required to have a relatively small thickness in order for the electron emission efficiency to be increased (i.e., in order for an increased mass of electrons to be emitted). However, the excessively smaller the film thickness of the insulator film or the oxide film, the more often dielectric breakdown may occur when a voltage is applied between upper and lower electrodes of the laminar structure. Accordingly, in the suggested field emission-type electron sources, the extent to which the film thickness of the insulator film or the oxide film can be reduced is limited. In view of the foregoing, the suggested field emission-type electron sources requires means to be taken to avoid any possible dielectric breakdown and, therefore, a problem is often encountered in sufficiently increasing the electron emission efficiency (electron extracting efficiency).
On the other hand, the Japanese Laid-open Patent Publication No. 8-250766 discloses a field emission-type electron source (a semiconductor element for emission of cold electrons) including, in order to increase the electron emission efficiency, a monocrystalline semiconductor substrate such as, for example, silicon substrate having one surface region anodized to define a porous semiconductor layer (a porous silicon layer) which is in turn overlaid by a metal thin-film. Application of a voltage between the semiconductor substrate and the metal thin-film results in emission of electrons.
However, in the field emission-type electron source disclosed in the above mentioned Japanese publication, a material for the substrate is limited to a semiconductor and, therefore, difficulty has hitherto been encountered in providing an electron source of a large surface format at a reduced cost. Also, this known field emission-type electron source is susceptible to a so-called popping phenomenon, accompanied by a varying quantity of electrons emitted. For this reason, application of this known field emission-type electron sources to a planar light emitter or a flat display would result in a pattern of uneven distribution of light.
In the Japanese Patents No. 2987140 (Japanese Patent Application No. 10-272340) and No. 296684 (Japanese Patent Application No. 10-272342), the inventors of the present invention have suggested the field emission-type electron source of a type wherein the porous polycrystalline silicon layer is oxidized by the use of a rapid thermal oxidation technique. Oxidation of the porous polycrystalline silicon layer by the use of the specific technique results in formation, between the electroconductive substrate and the metal thin-film, of a strong electrical field drift layer in which electrons injected from the electroconductive substrate can drift.
By way of example, as shown in FIG. 16, the field emission-type electron source (hereinafter, merely referred to xe2x80x9celectron sourcexe2x80x9d) 10xe2x80x2 includes an electroconductive substrate that is defined by an n-type silicon substrate 1. The n-type silicon substrate 1 has a major surface, with a strong electrical field drift layer (hereinafter, merely referred to xe2x80x9cdrift layerxe2x80x9d) 6 formed on the major surface of the silicon substrate 1. The metal thin-film identified by 7 is formed on the drift layer 6 as a surface electrode. An ohmic electrode 2 is formed on the back surface of the silicon substrate 1.
As shown in FIG. 17, the electron source 10xe2x80x2 when in use is disposed in a highly evacuated envelope together with a collector electrode 21. confronting the surface electrode 7. A direct current voltage Vps is applied between the surface electrode 7 and the silicon substrate 1 (specifically, the ohmic electrode 2) so that the surface electrode 7 can be held at a positive potential relative to the silicon substrate 1. On the other hand, a direct current voltage Vc is applied between the collector electrode 21 and the surface electrode 7 so that the collector electrode 21 can be held at a positive potential relative to the surface electrode 7. When the direct current voltages Vps and Vc are applied in the manner described above, electrons injected from the silicon substrate 1 into the drift layer 6 drift within the drift layer 6 and are then emitted through the surface electrode 7 (Single-dotted lines in FIG. 17 indicate flow of electrons exe2x88x92 emitted through the surface electrode 7.) Accordingly, it is considered desirable that the surface electrode 7 employed in the electron source 10xe2x80x2 is made of a material having a low work function.
The current flowing between the surface electrode 7 and the ohmic electrode 2 is generally referred to as a diode current Ips. On the other hand, the current flowing between the collector electrode 21 and the surface electrode 7 is generally referred to as an emitted electron current Ie. The higher the ratio (Ie/Ips) of the emitted electron current Ie relative to the diode current Ips, the higher the electron emission efficiency. In this electron source 10xe2x80x2 now under discussion, the electrons can be emitted even though the direct current voltage Vps is as low as 10 to 20 volts.
The electron source 10xe2x80x2 of the structure now under discussion has so low a dependency of the electron emission characteristic on the degree of vacuum that no popping phenomenon will occur at the time of emission of the electrons. For this reason, the electrons can be emitted stably at a high electron emission efficiency.
As shown in FIG. 18, the drift layer 6 is considered including at least polycrystalline silicon columns (grains) 51, thin silicon oxide films, fine crystalline silicon particles 63 in the nanometer order and silicon oxide films 64 serving as an insulator. The silicon oxide films 52 are formed on the surfaces of the polycrystalline silicon columns 51 with the fine crystalline silicon particles 63 interposed among the polycrystalline silicon columns 51. The silicon oxide films 64 each having a thickness smaller than the particle size of crystals forming the fine silicon particles 63 are formed on the surfaces of the fine crystalline silicon particles 63.
In the drift layer 6 of the structure described above, it may be thought that the surface of each grain is rendered porous while a core of the respective grain remains in a crystal form. Accordingly, the electric field applied to the drift layer 6 almost acts on the silicon oxide films 64. As the result, the electrons injected are accelerated under influence of the strong electric field acting on the silicon oxide films 64 so as to drift towards the surface through interstices among the polycrystalline silicon columns 51 as shown by the arrow-headed lines A in FIG. 10 (upward in FIG. 10). Accordingly, the electron emission efficiency can be increased. It is to be noted that the electrons arriving at the surface of the drift layer 6 are considered hot electrons that are tunneled through the surface electrode 7 into the highly evacuated atmosphere within the envelope. The surface electrode 7 has a thickness chosen to be within the range of 10 to 15 nm.
In the electron source 10xe2x80x2 shown in FIGS. 16 and 17, in place of the semiconductor substrate such as the n-type silicon substrate I used for the electroconductive substrate, an insulating substrate such as, for example, a glass substrate, on which an electroconductive layer such as, for example, an ITO film is formed may be advantageously employed. In this case, the electron source of a relatively large surface format can be fabricated at a reduced cost.
FIG. 19 illustrates the electron source 10xe2x80x3 utilizing the electroconductive substrate that is formed by depositing on an insulative substrate 11 such as a glass substrate on which an electroconductive layer 8 such as an ITO film is formed. In the electron source 10xe2x80x3 shown in FIG. 19, the electroconductive layer 8 in the form of the ITO film is formed on the insulating substrate 11. The drift layer 6 is formed on the electroconductive layer 8. The surface electrode 7 in the form of a metal thin-film is formed on the drift layer 6. The drift layer 6 referred to above is formed by depositing a non-doped polycrystalline silicon layer on the electroconductive layer 8, anodizing the polycrystalline silicon layer to render the latter to be porous and finally oxidizing or nitriding the polycrystalline silicon layer by the use of the rapid thermal technique.
Even in this electron source 10xe2x80x3, the electrons injected from the electroconductive layer 8 into the drift layer 6 drift within the drift layer 6 before they are emitted to the outside through the surface electrode 7, in a manner substantially similar to that discussed in connection with the electron source 10xe2x80x2 shown in FIG. 17. Even though the direct current voltage Vps applied between the surface electrode 7 and the electroconductive layer 8 in the electron source 10xe2x80x3 is as low as 10 to 20 volts, the electrons can be emitted.
However, in the electron source 10xe2x80x3 utilizing the insulative substrate 11 as discussed above, the drift layer 6 is formed by depositing a non-doped polycrystalline silicon layer on the electroconductive layer 8, anodizing the polycrystalline silicon layer to render the latter to be porous and finally oxidizing the polycrystalline silicon layer by the use of the rapid thermal oxidization technique. Since the temperature at which oxidization is carried out is relatively high (for example, ranging from 800 to 900xc2x0 C.), the insulative substrate 11 is required to be prepared from an expensive quartz glass. For this reason, the electron source 10xe2x80x3 has a problem in that increase of the surface format of the electron source 10xe2x80x3 and/or reduction in cost of making the electron source 10xe2x80x3 are hampered. To substantially eliminate the problem inherent in the electron source 10xe2x80x3 (hence, to enable the process to be performed at reduced temperatures), it may be envisioned to oxidize the porous polycrystalline silicon layer in contact with acid or irradiation of ultraviolet rays in a gaseous atmosphere containing at least one of oxygen and ozone. This oxidization technique allows the insulative substrate 11 to be prepared by the use of a glass substrate (such as, for example, a non-alkaline glass substrate, a low alkaline glass substrate or a soda lime glass substrate) that has a lower heat resistance than that of the quartz glass substrate and is more inexpensive than the quartz glass substrate.
It is, however, to be noted that in each of the electron sources 10xe2x80x2 and 10xe2x80x3, although the non-doped polycrystalline silicon layer is rendered to be porous in its entirety, it may be rendered to be porous in part.
However, during the manufacture of the electron source 10xe2x80x3 utilizing the insulative substrate 11 and particularly at the time the non-doped polycrystalline silicon layer is deposited on the electroconductive layer 8 in the form of the ITO film, an amorphous silicon layer of a high resistance tends to be formed at the interface between the electroconductive layer 8 and the non-doped polycrystalline silicon layer. For this reason, the amorphous silicon layer of a high resistance remains between the electroconductive layer 8 and the drift layer 6 or at the interface of the drift layer 6 with the electroconductive layer 8 and, consequently, supply of the diode current Ips tends to be accompanied by a voltage drop at the amorphous layer which in turn results in decrease of the voltage applied to the drift layer 6. This brings about a problem that the direct current voltage Vps necessary to secure a desired emission current Ie tends to be increased to such an extent as to result in reduction of electron emission efficiency. Also, once the voltage drop occurs at the amorphous silicon layer, heating takes place in the amorphous silicon layer, resulting in a loss of thermal stability. A Schottky barrier is observed between the electroconductive layer 8 and the amorphous silicon layer, and the voltage drop as well occurs at the Schottky barrier.
Further, in the electron source 10xe2x80x3 utilizing the insulative substrate 11, the thickness of the amorphous layer of a high resistance has a variance in the plane so that the potential in the plane has also a variance. Therefore, the degree to make the layer porous during the anodic oxidation has a variance in the plane. As the result, there may be caused such a disadvantage that the amount of emitted electrons has also a variance in the plane.
The presence of the amorphous layer of a high resistance in the drift layer 6 may often constitute a cause of formation of an amorphous layer 6a of a relatively great thickness in the drift layer 6 as shown in, for example, FIG. 20. In such case, the resistance of the drift layer 6 increases and the current flowing through the drift layer 6 decreases. For this reason, as compared with the electron source 10xe2x80x2 utilizing the n-type silicon substrate 1, a problem is found in that the amount of the electrons emitted tends to be reduced. In FIG. 20, reference numeral 6c represents a crystallized layer, other than the amorphous layer 6a, that is included in the drift layer 6.
Microscopic observation of the section of the electron source 10xe2x80x3 utilizing the insulative substrate 11, that is carried out by the use of a transmission electron microscope (TEM) has indicated that the amorphous layer 6a has an uneven thickness, as shown in FIG. 21. As discussed above, in the drift layer 6, the strongest electric field appears in the silicon oxide film 64 formed on the surface of the fine crystalline silicon layer 63. Accordingly, as shown in FIG. 21, the uneven thickness of the amorphous layer 6a results in a varying field intensity from place to place on the drift layer 6. For this reason, the electron source 10xe2x80x3 is incapable of allowing the electrons to be emitted uniformly from the entire surface of the surface electrode 7. Thus, the electron source 10xe2x80x3 has a problem in that the energies of the electrons emitted from the surface electrode 7 are not distributed uniformly.
Accordingly, the present invention has been developed with a view to substantially eliminating the above discussed problems in the prior art and is intended to provide an improved electron source (field emission-type electron source) having a high electron emission efficiency and a high thermal stability, and a method of manufacturing the same. Another object of the present invention is to provide an improved electron source of the kind referred to above that is inexpensive, but can emit an increased amount of electrons.
To this end, according to one aspect of the present invention, there is provided an electron source (i) which includes a substrate, an electroconductive layer formed on a major surface of the substrate, a semiconductor layer formed on the electroconductive layer, a drift layer (strong electrical field drift layer) in the form of an oxidized or nitrided porous semiconductor layer formed on a surface of the semiconductor layer remote from the electroconductive layer, and a surface electrode formed on the drift layer, (ii) in which when a voltage is applied with the surface electrode used as a positive electrode relative to the electroconductive layer, electrons injected from the electroconductive layer drift in the drift layer and are then emitted through the surface electrode, (iii) wherein the semiconductor layer is made of a low resistance semiconductor material utilizing means for lowering a resistance thereof or a low resistance semiconductor material formed by a process for lowering a resistance thereof.
In the electron source, since the low resistance semiconductor crystalline layer is formed on the electroconductive layer, the Schottky barrier resulting from the electroconductive layer can have a reduced thickness. For this reason, the current can be supplied by tunneling to reduce the voltage drop which would occur across the Schottky barrier. Accordingly, as compared with the electron source in which the high resistance amorphous semiconductor layer is formed on the electroconductive layer, the electron source of the present invention can exhibit a high electron emission efficiency and a high thermal stability.
In the above-mentioned electron source, preferably, at least a portion of the electroconductive layer adjacent the drift layer with respect to a direction of thickness thereof is made of an electroconductive material effective to suppress formation of an amorphous layer in the drift layer. In such case, the amorphous layer contained in the drift layer can be reduced and, therefore, the amount of electrons emitted can be increased while the cost is reduced.
In the above-mentioned electron source, preferably, the electroconductive layer is made up of at least two electroconductive films laminated one above the other. In this case, the uppermost one of the electroconductive films has a property of easily reacting with the semiconductor at about a temperature at which the drift layer is formed. This is particularly advantageous in that by properly selecting the material for the electroconductive film except the uppermost one, the resistance of the electroconductive layer can be reduced.
In the above-mentioned electron source, the uppermost electroconductive film may be made of Al, Ni, or an alloy including Al and Ni as main components. In this case, the uppermost electroconductive layer may be produced with a low cost. It is preferable that the thickness of the uppermost electroconductive layer is not greater than 50 nm. In this case, the amount of diffusion from the uppermost electroconductive film into the drift layer may be reduced. Further, any possible increase of the probability of scattering of electrons within the drift layer can be suppressed. For this reason, reduction of the electron emission efficiency can be suppressed.
In the above-mentioned electron source, the uppermost electroconductive film may be made of a material hard to diffuse into the drift layer as compared with Al. In such case, diffusion from the uppermost electroconductive film into the drift layer can advantageously be suppressed, resulting in improvement of the heat resistance and the time-dependent stability.
Also, in the above-mentioned electron source, a silicide layer may be formed between. the electroconductive layer and the semiconductor layer so that the resistance of the semiconductor layer can be lowered in the presence of the silicide layer. The presence of the silicide layer is effective to reduce the height of the Schottky barrier as compared with the case in which the high resistance amorphous semiconductor layer is formed on the electroconductive layer and also effective to increase the electron emission efficiency and the thermal stability. For this reason, diffusion of constituent elements of the electroconductive layer from the electroconductive layer into the semiconductor crystalline layer can advantageously be prevented. Also, alloying of the semiconductor crystalline layer resulting from the diffusion can also be suppressed to thereby increase the thermal stability.
In the above-mentioned electron source, the semiconductor layer may include a plurality of films having different resistances, with one of the films closer to the electroconductive layer exhibiting a lower resistance to thereby reduce the resistance of the semiconductor layer. In this case, a film of the semiconductor layer closer to the electroconductive layer can have a lower resistance and, therefore, the electron emission efficiency can be increased.
In the above-mentioned electron source, the semiconductor layer may be of a structure having a continuously varying resistance, with a portion of the semiconductor layer closer to the electroconductive layer exhibiting a lower resistance to thereby reduce the resistance of the semiconductor layer. In this case, a portion of the semiconductor layer closer to the electroconductive layer can have a lower resistance and, therefore, the electron emission efficiency can be increased.
In the above-mentioned electron source, the semiconductor layer having a low resistance may be formed by heating to crystallize after formation of an amorphous semiconductor layer. The semiconductor layer having a low resistance may be formed by annealing to crystallize after formation of an amorphous semiconductor layer. The semiconductor layer having a low resistance may be formed by laser annealing to crystallize after formation of an amorphous semiconductor layer.
In the above-mentioned electron source, the semiconductor layer having a low resistance may be formed by heating with use of hydrogen to crystallize after formation of an amorphous semiconductor layer. The semiconductor layer having a low resistance may be formed by crystallizing by means of a hydrogen plasma irradiation after formation of an amorphous semiconductor layer. The semiconductor layer having a low resistance may be formed by crystallizing by means of a hydrogen ion irradiation after formation of an amorphous semiconductor layer.
In the above-mentioned electron source, it is preferable that the amorphous semiconductor layer is a low resistance amorphous semiconductor layer doped with impurities.
The above-mentioned electron source may include impurities added to the semiconductor layer to reduce the resistance of the semiconductor layer.
The above-mentioned electron source may include impurities added to the semiconductor layer to form another semiconductor layer over the semiconductor layer having a low resistance. It may include impurities added by an ion implantation to the semiconductor layer to form another semiconductor layer over the semiconductor layer having a low resistance. It may include impurities added by an impurity diffusion to the semiconductor layer to form another semiconductor layer over the semiconductor layer having a low resistance.
In the above-mentioned electron source, it is preferable that heat treatment has been carried after formation of at least one of the semiconductor layer, a porous semiconductor layer, the drift layer and the surface electrode.
In the above-mentioned electron source, it is preferable that the drift layer includes semiconductor crystalline columns lying perpendicular to the major surface of the substrate, fine semiconductor crystals in nanometer order positioned among the semiconductor crystalline columns and insulating films having a film thickness smaller than a crystal size of the fine semiconductor crystals and formed on surfaces of the fine semiconductor crystals. In such case, in the drift layer, electrons injected from the electroconductive layer into the drift layer can be advantageously accelerated to drift under influence of an electric field applied to the insulating film without colliding against fine semiconductor crystals. At this time, heat evolved in the drift layer is dissipated through the semiconductor crystalline columns and, therefore, the electrons can be emitted at a high efficiency without being accompanied by the popping phenomenon.
The semiconductor layer may be made of a polycrystalline semiconductor. In this case, the surface area of the electron source can advantageously be increased.
Preferably, the polycrystalline semiconductor may be made of a semiconductor material capable of being formed by a low temperature process of not higher than 600xc2x0 C. In such case, a non-alkaline glass substrate that is inexpensive as compared with the quarts glass substrate can be used for the insulative substrate and, therefore, the manufacturing cost of the electron source can advantageously be reduced. Also, the surface area of the electron source can further be increased. Depending on the temperature at which the polycrystalline semiconductor layer is formed, a glass substrate having a low heat resistance as compared with the non-alkaline glass substrate such as a low alkaline glass substrate or a soda lime glass substrate can be employed for the insulative substrate.
In the above-mentioned electron source, the semiconductor layer may be made of silicon. Where silicon is used as material for the semiconductor layer, a silicon process can be employed and, therefore, where the electron source is applied in a display device or the like, the pattern of the electroconductive layer can be made fine or to a high precision.
In the above-mentioned electron source, the electroconductive layer may be also made of metal. In this case, the resistance of the electroconductive layer can easily be reduced. Yet, in the electron source, the substrate preferably is a glass substrate having a heat resistance to a temperature higher than or equal to 500xc2x0 C.
In another aspect, the present invention provides a method of manufacturing an electron source (i) including a substrate, an electroconductive layer formed on a major surface of the substrate, a semiconductor crystalline layer formed on the electroconductive layer, a drift layer in the form of an oxidized or nitrided porous semiconductor layer formed on a surface of the semiconductor crystalline layer remote from the electroconductive layer, and a surface electrode formed on the drift layer, (ii) in which when a voltage is applied with the surface electrode used as a positive electrode relative to the electroconductive layer, electrons injected from the electroconductive layer drift in the drift layer and are then emitted through the surface electrode, (iii) wherein the semiconductor crystalline layer is made of a low resistance semiconductor material utilizing means for lowering a resistance thereof or a low resistance semiconductor material formed by a process for lowering a resistance thereof. The method includes the steps of (iv) forming the electroconductive layer on the substrate, (v) forming an amorphous semiconductor layer on the electroconductive layer and then crystallizing the amorphous semiconductor layer to form the semiconductor crystalline layer, (vi) forming a semiconductor layer over the semiconductor crystalline layer and then rendering at least a portion of the semiconductor layer to be porous to thereby form the porous semiconductor layer, (vii) oxidizing or nitriding the porous semiconductor layer to form the drift layer, (viii) and forming the surface electrode on the drift layer. Hereupon, the amorphous semiconductor layer may be poly-crystallized, for example, by heating.
The electron source manufacturing method is effective to provide the electron source capable of exhibiting a high electron emission efficiency and a high thermal stability as compared with the electron source wherein the high resistance amorphous semiconductor layer is formed on the electroconductive layer.
In the method discussed above, the heating may be performed by means of a thermal annealing or a laser annealing. In such case, as compared with the electron source wherein the high resistance amorphous semiconductor layer is formed on the electroconductive layer, it is possible to provide the electron source capable of exhibiting a high electron emission efficiency and a high thermal stability.
In the method discussed above, the amorphous semiconductor layer may be crystallized by heating with use of hydrogen. The amorphous semiconductor layer may be crystallized by a hydrogen plasma irradiation. The amorphous semiconductor layer may be crystallized by a hydrogen ion irradiation. In such case, it is possible to provide. the electron source capable of exhibiting a high electron emission efficiency and a high thermal stability as compared with the electron source wherein the high resistance amorphous semiconductor layer is formed on the electroconductive layer.
Also, in the practice of the method of the present invention, the amorphous semiconductor layer may be made of a low resistance amorphous semiconductor doped with impurities. In this case, the resistance of the amorphous semiconductor layer can be optimally controlled to thereby optimally reduce the resistance of the low resistance semiconductor crystalline layer.
It is to be noted that in the foregoing manufacturing method, in place of the step (v) of forming an amorphous semiconductor layer on the electroconductive layer and then crystallizing the amorphous semiconductor layer to form the semiconductor crystalline layer, (ix) a step of forming on the electroconductive layer a semiconductor crystalline layer containing impurities added thereto may be employed. In such case, it is possible to provide the electron source capable of exhibiting a high electron emission efficiency and a high thermal stability as compared with the electron source wherein the high resistance amorphous semiconductor layer is formed on the electroconductive layer.
The impurities may be added to the semiconductor crystalline layer by means of an ion implantation or an impurity diffusion. Even in this case, it is possible to provide the electron source capable of exhibiting a high electron emission efficiency and a high thermal stability as compared with the electron source wherein the high resistance amorphous semiconductor layer is formed on the electroconductive layer.
Also, after formation of at least one of the semiconductor crystalline layer, the semiconductor layer, the porous semiconductor layer, the drift layer and the surface electrode, heat treatment may be carried out. In this case, the Schottky barrier formed by the electroconductive layer and the semiconductor crystalline layer can be reduced or removed, making it possible to provide the electron source capable of exhibiting a high electron emission efficiency and a high thermal stability.
The present invention also relates to a field emission-type electron source which comprises a substrate; an electroconductive layer formed on a major surface of the substrate; a low resistance semiconductor layer composed of a low resistance semiconductor material formed on the electroconductive layer; a non-doped semiconductor layer formed on the low resistance semiconductor layer; a strong electrical field drift layer in the form of an oxidized or nitrided porous semiconductor layer formed on a surface of the non-doped semiconductor layer-remote from the electroconductive layer; and a surface electrode formed on the strong electrical field drift layer, in which when a voltage is applied with the surface electrode used as a positive electrode relative to the electroconductive layer, electrons injected from the electroconductive layer drift in the strong electrical field drift layer and are then emitted through the surface electrode.
At least a portion of the electroconductive layer adjacent the strong electrical field drift layer with respect to a direction of thickness thereof is made of an electroconductive material effective to suppress formation of an amorphous layer in the strong electrical field drift layer.
The electroconductive layer can be made up of at least two electroconductive films laminated one above the other, and wherein the uppermost one of the electroconductive films has a property of easily reacting with a semiconductor at about a temperature at which the strong, electrical field drift layer is formed.
A silicide layer can be interposed between the electroconductive layer and the low resistance semiconductor layer and effective to lower the resistance of the low resistance semiconductor layer.
The low resistance semiconductor layer can comprise a plurality of films having different resistances and wherein one of the films closer to the electroconductive layer can exhibit a lower resistance.
The low resistance semiconductor layer can be of a structure having a continuously varying resistance, with a portion of the low resistance semiconductor layer closer to the electroconductive layer exhibiting a lower resistance to thereby reduce the resistance of the low resistance semiconductor layer.
The low resistance semiconductor layer can be formed by heating to crystallize after formation of an amorphous semiconductor layer.
The low resistance semiconductor layer can formed by crystallizing an amorphous semiconductor layer using hydrogen after formation of the amorphous semiconductor layer.
The low resistance semiconductor layer can be a low resistance amorphous semiconductor layer doped with impurities.
Impurities can be added to the low-resistance semiconductor layer to reduce resistance.
Impurities can be added to the low resistance semiconductor layer to form another semiconductor layer over the low resistance semiconductor layer.
Heat treatment can be carried out after formation of at least one of the low resistance semiconductor layer. a porous semiconductor layer, the strong electrical field drift layer and the surface electrode.